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Mouser signs Edge Impulse; accelerates intelligence at the edge

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Mouser reflected one of the major themes at Embedded World 2024, intelligence at the edge, and announced it has signed Edge Impulse, the software framework provider for embedded machine learning (ML) applications. Machine learning is implemented at the edge of the network, explained Mouser’s Mark Patrick in order to make decisions very quickly at the [network] edge. [Edge Impulse’s] products ...

Direct Insight announces partnership with MicroSys Electronics

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Systems integrator, Direct Insight, based in Oxfordshire, UK, has partnered with German SoM and SBC provider, MicroSys Electronics. The partnership covers the UK and Ireland. The minority of embedded designs are in-house, said Direct Insight’s CEO, David Pashley (pictured), often prohibited by NRE costs. The company’s strategy is to advise development teams to upgrade hardware (SoCs, FPGAs) and software, by ...

NXP steers a path for software-defined radar

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NXP Semiconductors has announced an extension to its 28nm RF cmos radar one-chip SoC family at CES in Las Vegas. The SAF86xx is the successor to the SAF8500 which is targeted at smart radar sensors. It supports a range of sensor outputs, including object, point cloud-, or range-FFT-level data for smart sensors in today’s architectures and streaming sensors in future ...

Sponsored Content: AVR® DB and AVR® DD families of microcontrollers

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Designed for work in circuits with varied voltage levels. Until recently, a very common problem faced by electronic circuit designers was the difference in supply voltage standards between microcontrollers (e.g. 3.3 V) and peripheral ICs (e.g. 5 V). In order for them to operate together, the use of additional voltage translators was required, which made the device more complicated and ...

Ceva adds cores and generative AI to neural processing IP portfolio

Ceva NeuPro-M neural processing IP

Ceva has filled-out its NeuPro-M family of neural processing units, and boosted its architecture for generative AI algorithms. “NeuPro-M NPU architecture and tools have been redesigned to support transformer networks in addition to convolutional neural networks,” according to the company. “This enables applications leveraging the capabilities of generative and classic AI to be developed and run on the NeuPro-M NPU.” ...

Halio adds 208Top/s PCIe processor board, and entry-level AI IC

Hailo-8 Century WHC AI PCIe board

AI chip maker Hailo has introduced a 208Top/s PCIe processor card for implementing neural networks, and an entry-level version of its Halio-8 IC. The PCIe cards, called ‘Hailo-8 Century’, execute at 400frame/s/W on the ResNet50 benchmark model, said the company, and the highest-performance version can run the same benchmark at 10,000frame/s. Versions start at 52Top/s, and video processing applications are ...

RISC-V Summit: Customisable vector unit

Semidynamics RiscV vector unit

Semidynamics has announced a customisable vector unit for RISC-V processor cores, compliant with RISC-V vector specification 1.0. Vector unit are composed of several vector cores that perform multiple calculations in parallel. In this case, Semidynamics’ vector core can be tailored to support FP64, FP32, FP16, BF16, INT64, INT32, INT16 or INT8 data types depending on requirements – the longest word-length ...

Arm announces next GPU architecture for phones

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Arm has announced its 5th generation of GPU architecture and the first GPUs to be designed on it – Immortalis-G720 for high-end phones, Mali-G720 and Mali-G620. The 5th generation is “designed as the most efficient GPU architecture that Arm has ever created [and] redefines parts of the graphics pipeline to reduce memory bandwidth enabling high geometry games and real-time 3D ...

A little more on: Cortex-X4, Arm’s most powerful core so far

Arm CortexX4 cluster

Arm has announced its latest architecture, the 64bit-only Armv9.2, and three grades of processor built on it. At the top-end of single-thread performance will be Cortex-X4, then Cortex-A720 in the middle, and Cortex-A520 at the power-saving bottom. These can be mixed and matched in clusters of cores (example right). “We are not only delivering the highest performing Arm Cortex CPU ...