Structured Asics hit 2.2m gates

Altera has introduced the next generation of its HardCopy structured Asic family.

According to the supplier, HardCopy II can offer custom device costs as low as $15 for one million Asic gates.

HardCopy II devices have the potential to deliver up to 2.2 million Asic gates, 8.8 million bits of RAM, and over 350MHz system performance. It is also specified to deliver over 50 per cent core power reduction from the design implemented in the Stratix II FPGA.


Its interface circuitry supports external memory at 233MHz for SDRAM and 250MHz for RLDRAM II. Additionally, devices also support 1Gbit/s differential I/O and high-speed interfaces, including 10Gigabit Ethernet (XSBI), SFI-4, SPI 4.2, HyperTransport, RapidIO, and UTOPIA Level 4 interfaces up to 1Gbit/s.


The firm is offering customers the ability to begin prototyping their HardCopy II designs on a Stratix II FPGA using Quartus II version 4.2 design software. Customer prototypes of the first HardCopy II device will be available in the third quarter of 2005.

The HardCopy II family has five members ranging in density between 1 million and 2.2 million ASIC gates. Volume pricing at 100,000 units starts at $15, with NREs starting at $225,000 for a full turnkey migration, including delivery of fully tested prototypes.

www.altera.com 


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