Xilinx releases design tool for 28nm 7 series FPGAs

Xilinx has released its design suite for the 28nm 7 series FPGA families including its newest Virtex-7 VX485T device.

The latest ISE software release also has enhancements to the PlanAhead design and analysis tool, providing partial reconfiguration support for Virtex-7 and Kintex-7 FPGAs, and front-to-back.

There is also a project management capability for designs targeting Spartan-6 FPGAs, Virtex-6 FPGAs, their defence grade counterparts, and all three 7 Series families including initial support for the Artix-7 family.

The PlanAhead tool is an extension of the firm’s I/O pin planner and floorplanner tools.

It now includes design analysis at each phase of the design cycle – RTL development, IP integration, verification, synthesis, place and route.

The ISE Design Suite 13.2 enables Advance eXtensible Interface (AXI) interconnect support in CORE Generator system.

Design teams building their own AXI compliant IP can now run simulations of the AXI interconnect protocol using the optional AXI BFM (bus functional model) verification IP to easily ensure all interface transactions are working properly.

The AXI BFM is available for ISim as well as Cadence, Mentor and Synopsys simulators.