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FPGA / PLD

The latest Electronics Weekly product news on FPGA (field-programmable gate array) and PLD (programmable logic device) devices to be (re)configured by a user after manufacturing.

Xilinx moves programmable chip design to system-level

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Xilinx continues to introduce FPGA development tools which it expects will make design of programmable devices accessible to a range of non-specialist developers. The SDSoC for the company’s Zynq All Programmable SoCs and MPSoCs is configured to simplify device programming by using an Eclipse integrated design environment (IDE). The intention is to support system-level design and the tool has a ...

SoC development board uses Zynq-7000 FPGA

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Pro Design has introduced a system-on-chip development module based around Xilinx Zynq-7000 FPGA. The Zynq XC7Z045 or XC7Z100 combines a user FPGA with an ARM core processor (dual ARM Cortex-A9 MPCore with CoreSight) and several on board peripherals such as USB 2.0 OTG, Gigabit Ethernet or ARM JTAG debug. The module offers a direct ARM debug interface that you user can benefit and use the proven ARM ...

Design kit for HDMI to USB 3.0 bridge

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Lattice Semiconductor and Cypress Semiconductor have worked together on a reference design for a bridge between USB 3.0 and high definition video interfaces such as HDMI and SDI audio/video. The USB 3.0 Video Bridge development kit combines a LatticeECP3 FPGA and the Cypress EZ-USB FX3 USB 3.0 peripheral controller. USB 3.0 supports 5Gbit/s data rates which can be used for ...

Lattice extends iCE40 FPGA family

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Lattice Semiconductor has extended its iCE40 low power FPGA family with iCE40 Ultra. The devices are intended for use adding functions to products – for example: infrared remote, barcode, touch, user identification, and pedometer functions. On the silicon are non-programmable blocks including LED drivers, multipliers-and-accumulators, and serial interfaces. “This ASSP-like integration reduces system power and speeds implementation so designers can ...

FPGAs can secure IoT devices, says Microsemi

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Embedded microprocessor designs can benefit from safe and secure boot-up code by making use of the trusted boot-up code held in an FPGA. A secure boot reference design from Microsemi uses the security features in its SmartFusion2 SoC FPGAs to securely boot any application processor in an embedded system. The intention is to ensure that processor code can be trusted during execution. “Very few processors ...

Avnet offers Rohm power supply for Zynq-7000

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Avnet has partnered with Rohm Semiconductor to develop a power supply module board specifically for Xilinx 7 series FPGAs and Zynq-7000 all programmable SoC’s evaluation kits. Rohm’s power supply module is used with the Avnet-designed Mini-Module Plus Development System. Based on the BD95601MUV/BD95602MUV power supply ICs, it is designed to meet the FPGA’s power tolerance and sequencing guidelines for startup ...

Altera speeds up FPGA compile times

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Altera claims the latest version of its Quartus II FPGA design software will cut compile times by 30% on average compared to the previous version. In some cases compile time can be cut by up to 70% through algorithm optimisation and increased parallelisation, said Altera. The software also includes the Rapid Recompile feature which allows for small source code changes on Altera Stratix V FPGA designs resing previous ...

Lattice adds sensor control to tiny low power FPGA

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Lattice Semiconductor has added new hardwired IP functions to its iCE40 range of low power and low density FPGAs. A new smaller package size is 1.4mm x 1.48mm x 0.45mm. The iCE40LM FPGAs have hardwired IP for strobe generators, I2C and SPI interfaces. The FPGAs with active power consumption of 1mW. “This means it is an order of magnitude lower ...

Altera adds high speed comms cores for 28nm FPGAs

Altera has been upgrading its IP core offering specifically for FPGAs and system-on-chip (SoC) devices designed for the 28nm process node. In the last 12months it has released more than 15 new protocol interface IP cores. Altera claims the IP cores in expanded IP portfolio have been upgraded to deliver 15% timing margin for faster timing closure. The portfolio of ...

IGLOO2 FPGAs designed via a PCIe slot

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Microsemi has introduced a PCI Express compliant form factor evaluation platform for its IGLOO2 FPGAs. The IGLOO2 FPGA evaluation kit includes a PCIe control plane demonstration design for the development of transceiver I/O-based FPGA designs to build PCIe and Gigabit Ethernet-based systems. The kit uses a standard laptop with an ExpressCard slot or a desktop with a PCIe slot. The kit includes a 12k logic ...