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FPGA / PLD

The latest Electronics Weekly product news on FPGA (field-programmable gate array) and PLD (programmable logic device) devices to be (re)configured by a user after manufacturing.

16nm FinFET FPGAs in production, says Xilinx

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Xilinx says it has reached a significant production milestone for its 16nm UltraScale+ FPGAs ahead of schedule. “Less than a year after first ship of all devices, open order entry for production devices is available this quarter,” said the company. Xilinx  UltraScale+ FPGA family is a FinFET-based programmable technology which is now available at 14nm or 16nm process nodes. This includes Kintex, Virtex UltraScale+ FPGAs ...

Intel samples Stratix 10 for data centres and networking

Stratix 10

Intel has started sampling its Stratix 10 FPGA, which uses Intel’s 14nm tri-gate (finfet) process. Claimed benefits over the last generation of Stratix are: 2x core performance 5x the density Up to 70% lower power than Stratix V (equivalent performance) Up to 10 TFlops single-precision floating point DSP Up to 1 Tbit/s memory bandwidth with integrated HBM2 (high-bandwidth memory) in-package ...

Achronix board delivers acceleration for data centres

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Achronix has announced availability of the new PCIe form factor Accelerator-6D accelerator board which is the industry’s highest single-FPGA memory bandwidth, PCIe add-in card for high-speed data center acceleration applications. The board integrates a Speedster 22i HD1000 FPGA with 700,000 look-up-tables that connects to six independent memory controllers allowing for up to 192 GB of memory and 690 Gbps of ...

Updated: Micro-sequencing crams 8051 into tiny FPGA space

MicroCore Labs MCL51

Californian start-up MicroCore Labs has announced an 8051 soft processor core, four of which will fit into 1227 LUTs on a Xilinx Artix-7 FPGA. The core is called MCL51. “Because it is based on a microsequencer, this four-core demonstration is even smaller than a single soft-core gate-based 8051,” the company founder, known simply as Edward, told Electronics Weekly. “The execution unit of ...

Sundance adds Xilinx Ultrascale FPGA to EMC-2 boards

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Sundance Multiprocessor Technology Of Chesham has integrated Xilinx’s smallest Kintex UltraScale FPGA with its EMC2-family of embedded boards for the “OneBank” PC/104-compatible format. Sundance’s EMC2-family is a range of industrial-grade and deployment-ready PC/104 boards that feature either a Xilinx Zynq SoC or Xilinx Artix/Kintex FPGAs. The EMC2-KU35 is the latest member and has two banks of 16-bit DDR4 with close ...

Lattice bridge IC brings mobile display interfaces to industrial apps

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Lattice Semiconductor has addressed the issue of multiple image sensor and display interface protocols with an FPGA-based bridge chip. Essentially, the device, called CrossLink, is a video interface bridge with a fast MIPI D-PHY capability that delivers up to 4K ultra-HD resolution at 12Gbit/s bandwidth. Protocols supported include MIPI D-PHY, MIPI CSI-2, MIPI DSI, MIPI DPI, CMOS, SubLVDS and LVDS.
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FPGAs get Hitless I/O for in-system hardware upgrade

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Lattice semiconductor has added to its MachXO3 family of FPGAs with the addition of the MachXO3L-9400 and MachXO3LF-9400 devices available in multiple packages. The new FPGAs offer expanded I/O and logic support for control PLD applications, while increased on-chip memory improves picture clarity for low cost video bridging in large monitor applications, says Lattice. Features include: Glue-less 1V I/O interface for ...

Xilinx and IBM put big data FPGA design in the cloud

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Cloud-based FPGA design is the focus of a tie-up between Xilinx and IBM. IBM’s cloud service will host the Xilinx SDAccel development environment which will allow developers to describe their algorithms in OpenCL, C, and C++  and then compile directly to Xilinx FPGA-based acceleration boards. This is an open access cloud service, called SuperVessel,  which can be used by application developers, ...

Cryptographic keys protect production FPGAs, says Microsemi

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Microsemi has introduced a secured production programming capability for its FPGAs. The firm uses hardware and software to generate and inject cryptographic keys and configuration bitstreams into its FPGAs as a preventative measure against cloning, reverse engineering, malware insertion or leakage of sensitive intellectual property (IP). Called SPPS, the security package includes the use of “customer” and “manufacturer” hardware security ...