Neural network accelerators for Lattice FPGAs

Lattice has introduced two hardware artificial intelligence algorithm accelerators for its FPGAs, one for binarised neural networks (BNNs) and one for convolutional neural networks (CNNs).

Both are aimed at implement neural networks in consumer and industrial network-edge products. They are not suitable for network training, which must be done elsewhere.

‘Binarized neural network (BNN) accelerator’ supports 1bit weights, has 1bit activation quantisation, and is designed to be used with the firm’s iCE40 UltraPlus FPGAs.

The combination of accelerator and FPGA is intended for always-on applications such as verbal key phrase detection, face detection and object detection.

Predicted BNN + iCE40 UltraPlus application parameters are:

1bit neural network
1-10mW active consumption
5.5mm2 footprint
~$1 bom

The second product, ‘convolutional neural network (CNN) accelerator’, supports a choice of 1, 8 and 16bit data for both weights and activation, is aimed at ECP5 FPGAs – which are generally intended for video use.

To save FPGA resources, different word widths (1, 8 or 16bit) can be mixed and matched in different layers of the neural net.

This combination of accelerator and FPGA is intended for applications including face tracking, object tracking, speed sign detection and object counting.

Predicted CNN + ECP5 application parameters are:

1, 8, or 16bit network
<1W active consumption
100mm2 footprint
~$10 bom

For software development, the firm is introducing a neural network compiler compatible with both Caffe and TensorFlow network development systems.

According to Lattice marketing director Deepak Boppana, the compiler requires no prior RTL experience, and will also analyse and simulate designs.

The plan is, said Boppana, that the compiler will be used alongside the firm’s Radiant development environment for the BNN + iCE40 UltraPlus combination, or its Diamond development environment for CNN + EC5P.

For customers unsure how to develop a neural network-based application, the firm has partnered with design services companies including Colorado Engineering, Wipro, Softnautincs and VectorBlox.

Hardware development boards are already available for the iCE40 UltraPlus and ECP5.

Interface bridging and data aggregation applications are expected in high-volume IoT applications including smart speakers, surveillance cameras, industrial robots and drones.

Reference designs are being provided for: face detection, key phrase detection (iCE40 UltraPlus), and for the EC5P: object counting, face tracking, and speed sign detection.

The accelerators are branded ‘sensAI‘.