Electronics Weekly Electronics Design & Components Tech News
The mid-range e300 core is an upgraded version of the 603e PowerPC core used in previous-generation PowerQUICC II processors that scales from 266 to 667MHz in 130nm process technology.
The enhanced core includes a 32kbyte data cache and a 32kbyte instruction cache (double the amount of L1 cache available in the 603e core) along with integrated parity-checking and other performance-oriented features.
At the high end the e500 core will scaling beyond its current 1GHz operation to 1.5GHz in next-generation process technologies.
The next generation of PowerQUICC II integrated communications processors the MPC8349E is being targeted at embedded control applications, such as Ethernet routers and switches, wireless LAN equipment, embedded security devices and industrial control.
The MPC8349E family includes the first PowerQUICC II processors to support a 64-bit double data rate (DDR) SDRAM memory controller (scaling from 266MHz to 333MHz); dual USB controllers with device, host and on-the-go functionality; and dual 10/100/1000 Ethernet controllers. It also has a 64-bit PCI controller, operating at up to 66MHz, which can be configured as dual 32-bit PCI ports.
