Cambridge firm speeds test of boards via enhanced JTAG

“It came about as a requirement from our own engineers, who were seeing more BGA packages,” said Simon Payne, CEO of XJTAG and parent company the Cambridge Technology Group.

Bumps on a ball grid array or chip scale package are generally not accessible to logic analysers or scope probes.
While JTAG tools existed, they were not flexible enough, said Payne. “We found they were very board centric, we wanted to be device centric.”

Board centric means that any change to the board, however small, forces a rewrite of the test vectors.
The firm decided to develop its own tool and a new test flow.

XJAnalyser is the main tool in the flow. It takes in standard BSDL files, available from device manufacturers, and brings up a graphical view of the pins on a JTAG-enabled device.

The engineer can exercise those pins, ensuring they go high and low, and checking for short and open circuits.
The second tool in the flow, XJEase, enables the testing of non-JTAG devices.

For example, an Ethernet controller can be tested by sending and receiving packets, without any memory or microprocessor running.

To do this, XJEase takes in the BSDL files, board netlist and test scripts. It automatically works out how to access the non-JTAG device via the address and data bus and other JTAG-enabled devices.

“We’ve not come across one [another product] that works in this way at all,” said Payne.  Moreover, the test script can be re-used when the device is used in another design.

Like other JTAG tools, XJTAG can programme flash memory and FPGAs and run traditional test vectors.

XJTAG has been tested by three UK firms – ARM, Cambridge Broadband and Alphamosaic. “The people taking it up are at the cutting edge of technology,” said Payne.

The firm will be selling the complete tool set for €9,000, including a roaming licence so it can be used in the field to test production systems.