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Arm’s most powerful neural processor for microcontrollers

Steve Bush — Tue, 09 Apr 2024 04:00:22 +0000

Arm has announced its most powerful microcontroller-grade neural processor, which will reach 4Top/s in its maximum configuration and is 20% more power efficient that its previous neural processors. Named Ethos-U85 ...

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Embedded World: ASIL D qualified Rust compiler for Infineon TriCore processors

Steve Bush — Fri, 05 Apr 2024 13:59:30 +0000

Infineon has lined up a Rust programming language compiler for two of its TriCore architecture processor families: the existing TC3x and forthcoming TC4x. “Rust, with its unique memory safety features, ...

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Semidynamics proposes modular RISC-V architecture for scalable AI processing

Steve Bush — Fri, 05 Apr 2024 06:00:47 +0000

Barcelona-based Semidynamics is aiming at next-generation AI chips and algorithms such as transformer with intellectual property called ‘All-In-One AI’. Rather than having on the same IC a multi-core CPU, a ...

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Accelerated RISC-V core optimised for edge AI and cryptography

Steve Bush — Wed, 03 Apr 2024 15:45:50 +0000

Red Semiconductor has announced RISC-V instruction set extensions, and a hardware design, for edge AI and cryptography in asics and FPGAs. The hardware, called ‘VISC’, is an accelerated RISC-V core ...

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Linux-capable RISC-V soft cores for Achronix FPGAs

Steve Bush — Tue, 26 Mar 2024 17:20:45 +0000

Achronix has teamed up with Bluespec to offer a family of Linux-capable RISC-V soft processors for the Speedster7t FPGA family. “Bluespec’s RISC-V processors now integrate into the Achronix 2D network-on-chip ...

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Nvidia packages inference to deliver generative AI for healthcare

Caroline Hayes — Thu, 21 Mar 2024 08:01:59 +0000

Optimised packages of AI models and workflows with API have been packaged as NIMs (Nvidia Inference Microservices) which developers can use as building blocks to develop generative AI for healthcare, ...

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Nvidia offers Omniverse Cloud as APIs

Caroline Hayes — Tue, 19 Mar 2024 01:21:45 +0000

A new take on the concept of digital twins was announced by Nvidia at its developer conference in San Jose this week, as founder and CEO, Jensen Huang announced that ...

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Network-on-chip supports Arm v9 and automotive functional safety

Steve Bush — Wed, 13 Mar 2024 16:42:51 +0000

Arteris is supporting Armv9 automotive cores and ASIL D functional safety with release 3.6 of its Ncore cache coherent network-on-chip. “In 2020, Arteris announced a partnership with Arm and the ...

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Emulation and prototyping trio addresses AI, ML and hyperscale computing

Caroline Hayes — Tue, 20 Feb 2024 15:01:39 +0000

Siemens EDA has announced three products, for emulation, evaluation and software prototyping for data centres and servers. The Veloce CS consists of the Strato CS hardware, for emulation, the Primo ...

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Training-grade PDK for 2nm gate-all-around ICs

Steve Bush — Fri, 16 Feb 2024 10:32:36 +0000

Imec has launched an early-access process design kit for the N2 (2nm ICs) node. “The PDK will enable virtual digital designs in imec’s N2 technology, including backside power delivery network,” ...

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