EDA and IP

ARM and Taiwan Semiconductor Manufacturing Company have extended their relationship for development of a suite of ARM Advantage products, part of its family of Artisan physical IP, in support of TSMC's 65- and 45nm G processes

Cadence and SMIC have announced the joint development of an analogue mixed-signal reference flow

Representing IP in multi-vendor EDA tool flows involves issues that still need to be addressed, according to Chris Lennard, vice-chairman of the Spirit Consortium

Mentor Graphics has released an automated routing version of its XtremePCB design tool that can be distributed over up to 15 CPUs to cut design cycle times

ARM has released the latest version of its RealView development suite, adding features to support hardware-software co-design in Asic, SoC and FPGA designs

Oxford-based EDA firm shifts development resources from its system level design side towards its hardware acceleration activity where it reckons it can achieve significant technical advances by the end of this year

EDA company CoWare has announced new tools that enable designers to develop and test embedded software, from device drivers up to application software, on a virtual hardware system

Celoxica has reported its first set of results as a listed company, with increased turnover and reduced losses. The firm reported turnover up 24 per cent to £4.3m and a loss of £2.3m, against a loss of £5.1m previously

Chip design will flow from the result of decisions made about the industrial design and usability of the product it goes into, due to coming electronic system level EDA tools, according to CoWare

A powerful new force enters the EDA business this week with the launch of a start-up consisting of 14 Cadence and Synopsys veterans who are set on solving the problems of achieving design closure for sub-100nm ICs