Arithmatica launches maths IP libraries for ICs

Arithmatica, a firm which started life in Oxford six years ago to develop innovative maths for silicon chip designs, has launched a line of IP libraries aimed at maths-intensive ICs such as graphics chips and high-end processors.

The company, formerly known as Automatic Parallel Designs, has also revealed that Nvidia and Xilinx are among customers using the CellMath library in next generation designs.

“There’s a class of ICs where the specifications are directly tied to the quality of the math implementation in silicon, and those chips are in the graphic and high performance processor areas,” explained Dave Burow, CEO of Arithmatica. “Our team has come up with some fundamental breakthroughs in how math is implemented in silicon, particularly with respect to addition and multiplication, and better ways to implement floating point.”


Nvidia claims that by using CellMath it has made die area savings of between 20 and 30 per cent in its next generation devices, equivalent to “more than a process generation”, said Burow. The technology is provided as a gate-level Verilog netlist, and is independent of the particular process and library used.


“Our main target market is those customers doing standard cell-based design,” continued Burow. “We would provide a gate-level Verilog netlist, and that would be incorporated either into their design compiler, a physical compiler, or another synthesis tool, and be finally optimised in that last part of the flow.”

Arithmatica is now based in California but retains its UK R&D facility.


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