Cadence offers academia PDK for open source 130nm SkyWater process

A PDK for the SkyWater open-source 130 nm process will be available in the Cadence VLSI (very large-scale integration) Fundamentals Education Kit.

The kit teaches students how theories and concepts can be applied in the design of simple logic circuits and in the physical implementation of a simplified microprocessor.

SkyWater collaborated with Cadence to create an open-source chip manufacturing program on 130 nm CMOS process (SKY130).


Cadence offers academia PDK for open source 130nm on SkyWater

The SKY130 process has gained popularity among academia and researchers and can be accessed from GitHub with no NDA necessary.


The SKY130 open-source offering has implications for accelerating and multiplying collaboration in semiconductor chip design.

Verification results can be easily and cost-effectively replicated by other designers and idea generation can be amplified to feed product development that is ongoing in IoT, automotive, industrial, medical and defense applications.

“It’s a vast expansion for SkyWater’s serviceable available market for SKY130 and speaks to the power of the open-source model,” says SkyWater CTO Steve Kosier. “Access for students to the open-source PDK will support curricula in semiconductor degree programs, helping to build the workforce critically needed for reshoring the semiconductor ecosystem.”

The Cadence VLSI Fundamentals Education Kit is a CMOS VLSI Design course structured to enhance academic curriculum, which contains several lecture presentations to teach the fundamental theoretical knowledge of VLSI design.

It also contains four labs that explain the design of a mixed-signal IC using Cadence’s latest tools: Virtuoso Studio, Genus Synthesis Solution, Innovus Implementation System, Xcelium Logic Simulator, Pegasus Verification System, and Spectre Simulation Platform.

The design is based on a simple Arm-based microprocessor and is being migrated to the SKY130 PDK..


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