Xilinx adds hardened IP to increase RFSoC performance for 5G

Xilinx has announced an enhanced Zynq RFSoC architecture to meet the requirements of a second wave of 5G.

The ZynqRFSoC DFE integrates hardened digital front end application-specific blocks for 5G NR performance. It will operate up to 7.125GHz and is futureproofed for 3GPP and O-RAN radio architectures, says Gilles Garcia, director of Wired Communication, at Xilinx.  Release 17 of 3GPP will be announced in December and is expected to focus around 5G, carrier aggregation and satellite connection to extend its reach.  O-RAN will unlock the single vendor paradigm, said Garcia, allowing the radio vendor to talk to basestations from different vendors.

5G development will require products with greater bandwidth, consume less power and in small form factors and higher levels of integration, while being cost-sensitive for widespread deployment. Other requirements will also be enhanced mobile broadband, massive machine type communication, and reliable low-latency communication.


The Zynq RFSoC DFE integrates hardened DFE application-specific blocks for 5G NR performance and power savings and can integrate programmable adaptive logic for 5G 3GPP and O-RAN radio architectures.


It offers two times performance-per-watt compared to the Generation 3 (6GHz) model and scales from small cell to massive MIMO macrocells. According to Xilinx it is the industry’s only direct RF platform that enables carrier aggregation/sharing, multi-mode, multi-band 400MHz instantaneous bandwidth in all FR1 bands, and emerging bands up to 7.125GHz. When used as a mmWave intermediate frequency transceiver, it provides up to 1,600MHz of instantaneous bandwidth.

To be competitive with asics, the Zynq RFSoC DFE allows customers to bypass or customise the hard IP blocks. For example, developers can use the company’s digital pre-distortion (DPD) core which supports existing and emerging GaN power amplifiers or insert their own DPD IP.

The evolution of 5G will require a blend of components to meet bandwidth, size and power requirements and the adaptable logic fabric of the Zynq RFSoC with hardened IP will support up to eight carriers per antenna and provide instantaneous bandwidth for higher throughput, added Garcia.

Design documentation and support is available to early access customers. Shipments are expected to begin in the first half of 2021.


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