Researchers at Stanford University have modelled over-night home charging of electric vehicles and predict that it is not the correct strategy, for the Western US at least. Simulation is based on a model, revealed in March, for charging demand that can be applied to different human populations under different conditions. In a demonstration, they have now applied it to the ...
Vicor’s next generation of dc-dc converter modules operate across 43-154V for rail transport and infrastructure applications. For most versions maximum output power is 240W, despite the 36 x 23mm (‘3623’) footprint. The outputs are regulated and isolated, and efficiency is up to 93%. “Modern rail infrastructure requires a wide range of DC-DC converters to power a variety of new services ...
The sheer scale of telecoms service revenues never ceases to amaze. Asian telecoms service revenue will grow by $94 billion or 29% from $229.7 billion in 2011 to reach $323.7 billion by 2016, according to AnalysisMason.
The iTunes store of the IP world is called Xena. It’s an IP shop set up by IPextreme.
Fujitsu has announced its third generation 14bit CMOS DACs, claiming it to be the world's fastest at 12Gsample/s. Dubbed MB86066, the part is aimed at...
NXP has announced a 16bit dual-channel DAC which supports output update rates of up to 1.25Gsample/s. Called DAC1627D, it sports an LVDS DDR interface and is aimed at wireless...
How to share infrastructure is likely to become the hottest topic in rolling out next generation broadband access (NGA), especially in rural areas, it emerged at the NextGen10 conference in Birmingham this week. Simon Towler, head of the Department of Business, innovation & skills’ broadband programme, said it was an issue on which he had spent several years, and was ...
Like watching a champion golfer miss a two foot putt, you get a frisson of schadenfreude when seeing a top-notch tech company screw up.
Virage will establish an R&D centre in Eindhoven providing on-going support to NXP and developing products based on the acquired CMOS I/O, analogue, mixed signal and (SoC) infrastructure IP.
Microprocessor-based defence subsystems are traditionally built using multiple embedded boards, each running a single application or component that together delivers the functionality required by the subsystem. But this traditional approach no longer scales, and a RTOS architecture and system infrastructure - Multiple Independent Levels of Security - has emerged to meet the new challenges.
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