DASA launches competition for Morello/CHERI within Defence and Security

The UK’s Defence and Security Accelerator (DASA) is launching a £1.5 million competition to trial the CHERI security architecture in a defence and security context.

CHERI stands for Capability Hardware Enhanced RISC Instructions, and it addresses memory safety issues and enables fine grain protection of applications.

For its part, DASA is seeking proposals to experiment the effects of the CHERI-based architecture extensions within Arm’s Morello prototype SoC.

Funding

Up to £1.5 million funding is available to back several proposals up to the amount of £100k.

The competition is funded by a Defence Science and Technology Laboratory (Dstl) Cyber Programme, and the organisers say they hope to assess “a wide selection of software applications and platforms”:

“The aim is to grow our understanding of the potential benefits or challenges of deploying such processor technologies within Defence and Security systems. We also seek to increase the base of potential defence suppliers with experience of Morello, to provide a pool of future innovation the UK can draw on.”

The deadline to submit a proposal is midday 14 November 2022.

Note that the competition has three possible challenge areas. Firstly, ‘Code Porting’, to port an existing codebase or tool into the Morello environment and strengthen its security by using the Morello enhanced security features.

Secondly ‘Software Compartmentalisation’, to refactor an existing application to employ fine grain software compartmentalisation.

Thirdly, ‘Innovation’, to conduct research in an area, such as a security enhancing innovation, now enabled by the the Morello features.

You can find more information here.

Arm Morello

The Arm Morello Program, which is funded by Digital Security by Design (DSbD), is a collaboration between academia, industry and government to research more secure hardware and software, to improve built-in security. CHERI is an underpinning technology.

Using CHERI technology, Arm has designed a prototype SoC and development board, which is called the Morello board, an industrial quality implementation of CHERI.

The Morello board is being distributed to industry and academia to test the prototype architecture to investigate and experiment on its capabilities.

See also: University of Oxford collaborates to secure routers