This expands upon Synopsys’ recent announcement to deliver Synopsys.ai Copilot, the first in a series of GenAI capabilities for chip design.
Early collaborations with AMD, Intel, and Microsoft have substantiated the power of generative AI for chip design.
The integration of GenAI across the Synopsys.ai suite will provide chip designers with collaborative capabilities that offer expert tool guidance; generative capabilities for RTL, verification, and other collateral creation; and autonomous capabilities for workflow creation from natural language.
The Synopsys.ai EDA suite accelerates the chip design workflow by enabling companies to build more chips faster with a workforce that is not growing at the same pace as the industry demands.
GenAI capabilities include:
- Collaborative capabilities that provide engineers with guidance on tool knowledge, analysis of results, and enhanced EDA workflows
- Generative capabilities to expedite development of RTL, formal verification assertion creation, and UVM testbenches
- Autonomous capabilities, which will enable end-to-end workflow creation from natural language spanning architecture to design and manufacturing
For more information, visit www.synopsys.ai.