To handle suitable sub-Thz frequencies, transmitter and receiver were made on a 130nm SiGe BiCMOS process using largely bipolar transistors in the RF paths.
Data is actually transmitted by wavelength division multiplexing using three carriers at 220, 260 and 300GHz, each carrying 35Gbit/s
The transmit signal chain starts with 44.3GHz and 20GHz sources.
To get the 260GHz channel, 44.3GHz is tripled to 130GHz, then data is added by on-off keying a frequency-doubling modulator.
The other two channels are created by tapping off 130GHz, then single-side-band mixing it up and down with 20GHz to make 110 and 150GHz carriers, which get their own frequency doubling data mixers.
A tri-plexer combines the three signals onto microstrip, which carries the 105Gbit/s signal, centred on 260GHz, to a ‘differential substrate-integrated-waveguide’ coupler that turns the microstrip into a leaky travelling wave that is exposed to the dielectric ribbon through a slot – the 250 x 400μm ribbon is ceramic-filled PTFE (Rogers R3006, 6.5 dielectric constant).
Although there are plans for a three channel receiver, the proof-of-concept used a single-channel receiver. Its coupler is the same as the transmit coupler, and its direct-conversion mixer gets 220, 260 or 300GHz from outside to take any one of the three modulated inputs straight to baseband for decoding.
The Tx and Rx chips are 2.4 x 3.9mm and 0.9 x 0.9mm respectively. Without equalisation, three-channel bit error rate was ≤5×10-8, or ≤5×10-9 for a shorter (50mm) ribbon.
The work was described at the virtual International Solid-State Circuits Conference (ISSCC 2021).
“Link lengths of 5cm and 30cm are chosen, which are ultimately limited by the available space of the assembly and fragility of the thin ribbon, rather than the link budget,” according to the presentation.
Further integration is planned, and metre-range links in applications such as data centres, autonomous cars, drones and other flying vehicles are foreseen.
MIT worked with Raytheon and Intel.
ISSCC 2021 paper 11.9: A 105Gb/s dielectric-waveguide link in 130nm BiCMOS using channelized 220-to-335GHz signal and integrated waveguide coupler
The image is copied from the ISSCC 2021 Digest, with permission