Silicon Box to build chiplet plant in Italy

Three year-old Singapore chiplet startup Silicon Box will invest €3.2 billion in Italy to build a packaging plant in northern Italy, according to Italy’s industry minister Adolfo Urso.

‘Recent global upheavals highlight the need to build a more resilient supply chain for semiconductors in Europe,” said Urso yesterday.

The move comes after negotiations between Intel and the Italian government about building a packaging plant in the country fell through.


Silicon Box was founded by Marvell founders Sehat Sutardja and Weili Dai with Dr B.J Han and  completed a $200 million Series B funding round last year.  It has built a $2 billion, 750,000 sq ft Singapore assembly plant where it moved into volume production last October.


”Silicon Box is well poised to solve the semiconductor industry’s challenges for fast adoption of chiplet. We are leading the pack to bring high performance, power-optimized, affordable, and scalable solutions that enable next-gen large language models (LLM), generative AI, automotive, data centers, and mobile computing globally,” according to Han, “our state-of-the-art factory and advanced panel level packaging are delivering a solution to scale high growth markets, such as AI accelerators, to the masses. This is our first multibillion-dollar factory and we are eager to scale rapidly to support our customers and partners.”

The company claims to have the shortest chiplet-to-chiplet interconnection, reducing the manufacturing costs for high performance devices by up to 90%, with better thermal and electrical performance which is especially crucial for the high growth AI accelerator market.

In addition to the three founders, investors in Silicon Box include: BRV Capital; Event Horizon Capital; Grandfull Convergence Fund; Hillhouse Capital; the corporate venture arm of Lam Research, Lam Capital; Maverick Capital; Prasedium Capital; Tata Electronics; TDK Ventures; and UMC CapitalQa.

The Italian plant is expected to generate 1,600 jobs at full capacity.


Comments

2 comments

  1. Short chiplet interconnects won’t be necessary after optical connectors are adopted. Chiplets and high heat generating optical coprocessors need to be separated for easier heat dispersion.

    • Do you realise how much heat optical interconnect generates ? Fine for long distance gigabit connections but no use for the thousands of connections a chiplet needs.

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